A Novel Σ∆ Modulator Design Applied to Dual GSM/WCDMA Receiver
نویسندگان
چکیده
A novel Σ∆ modulator is presented with lower power consumption and higher Signal to Noise Ratio (SNR) than the conventional modulator for a given order. The novel modulator is applied in analog-to-digital converters of RF receivers. The same modulator architecture is used for GSM and WCDMA receivers differing only the in Oversampling Ratio (OSR). The modulator was designed using switched capacitor circuits and could be implemented in VLSI.
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